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HUF76112SK8
TM
Data Sheet
April 2000
File Number
4834.1
7.5A, 30V, 0.026 Ohm, N-Channel, Logic Level Power MOSFET
The HUF76112SK8 is an Application-Specific MOSFET optimized for switching when used as the upper switch in synchronous buck applications. The low gate charge and low input capacitance results in lower driver and lower switching losses, thereby increasing the overall system efficiency.
Features
* 7.5A, 30V - rDS(ON) = 0.026, VGS = 10V - rDS(ON) = 0.033, VGS = 5V * PWM Optimized for Synchronous Buck Applications * Fast Switching * Low Gate Charge - Qg Total 15nC (Typ) * Low Capacitance - CISS 725pF (Typ) - CRSS 36pF (Typ)
Symbol
SOURCE (1) SOURCE (2) SOURCE (3) GATE (4) DRAIN (8) DRAIN (7) DRAIN (6) DRAIN (5)
Packaging
SO8 (JEDEC MS-012AA)
BRANDING DASH
Ordering Information
5
PART NUMBER HUF76112SK8
PACKAGE MS-012AA
BRAND 76112SK8
1
2
3
4
NOTE: When ordering, use the entire part number. Add the suffix T to obtain the HUF76112SK8 in tape and reel, e.g., HUF76112SK8T. TA = 25oC, Unless Otherwise Specified PARAMETER HUF76112SK8 30 30 16 7.5 4.0 Figure 4 2.5 20 -55 to 150 300 260 50 152 189 UNITS V V V A A A W mW/oC
oC oC oC oC/W oC/W oC/W
Absolute Maximum Ratings
SYMBOL VDSS VDGR VGS ID ID IDM PD TJ, TSTG TL Tpkg
Drain to Source Voltage (Note 1) Drain to Gate Voltage (RGS = 20k) (Note 1) Gate to Source Voltage Drain Current Continuous (TA = 25oC, VGS = 10V) (Figure 2) (Note 2) Continuous (TA = 100oC, VGS = 5V) (Note 2) Pulsed Drain Current Power Dissipation (Note 2) Derate Above 25oC Operating and Storage Temperature Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s Package Body for 10s, See Techbrief TB334 Thermal Resistance Junction to Ambient Measured using FR-4 board with 0.76 in2 (490.3 mm2) copper pad at 10 second.
THERMAL SPECIFICATIONS
RJA
Measured using FR-4 board with 0.054 in2 (34.8 mm2) copper pad at 1000 seconds. (Figure 23) Measured using FR-4 board with 0.0115 in2 (7.42 mm2) copper pad at 1000 seconds. (Figure 23)
NOTES: 1. TJ = 25oC to 125oC. 2. RJA = 50 oC/W
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright (c) Intersil Corporation 2000 UltraFET(R) is a registered trademark of Intersil Corporation.
HUF76112SK8
Electrical Specifications
PARAMETER OFF STATE SPECIFICATIONS Drain to Source Breakdown Voltage Zero Gate Voltage Drain Current BVDSS IDSS ID = 250A, VGS = 0V (Figure 12) VDS = 25V, VGS = 0V VDS = 25V, VGS = 0V, TA = 150oC Gate to Source Leakage Current ON STATE SPECIFICATIONS Gate to Source Threshold Voltage Drain to Source On Resistance VGS(TH) rDS(ON) VGS = VDS, ID = 250A (Figure 11) ID = 7.5A, VGS = 10V (Figures 9, 10) ID = 4.0A, VGS = 5V (Figure 9) SWITCHING SPECIFICATIONS (VGS = 5V) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time tON td(ON) tr td(OFF) tf tOFF VDD = 15V, ID = 4.0A VGS = 5V, RGS = 20 (Figures 15, 21, 22) 11 40 35 32 77 100 ns ns ns ns ns ns 1 0.022 0.027 3 0.026 0.033 V IGSS VGS = 16V 30 1 250 100 V A A nA TA = 25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
SWITCHING SPECIFICATIONS (VGS = 10V) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time GATE CHARGE SPECIFICATIONS Total Gate Charge at 10V Total Gate Charge at 5V Threshold Gate Charge Gate to Source Gate Charge Gate to Drain "Miller" Charge CAPACITANCE SPECIFICATIONS Input Capacitance Output Capacitance Reverse Transfer Capacitance CISS COSS CRSS VDS = 25V, VGS = 0V, f = 1MHz (Figures 13) 725 325 36 pF pF pF Qg(TOT) Qg(TOT) Qg(TH) Qgs Qgd VGS = 0V to 10V VGS = 0V to 5V VGS = 0V to 1V VDD = 15V, ID = 7.5A, Ig(REF) = 1.0mA (Figures 14, 19, 20) 15 7.2 0.74 2.1 2.9 18 8.7 0.9 nC nC nC nC nC tON td(ON) tr td(OFF) tf tOFF VDD = 15V, ID = 7.5A VGS = 10V, RGS = 20 (Figures 16, 21, 22) 7.2 43 52 45 75 145 ns ns ns ns ns ns
Source to Drain Diode Specifications
PARAMETER Source to Drain Diode Voltage SYMBOL VSD ISD = 7.5A ISD = 4A Reverse Recovery Time Reverse Recovered Charge trr QRR ISD = 7.5A, dISD/dt = 100A/s ISD = 7.5A, dISD/dt = 100A/s TEST CONDITIONS MIN TYP MAX 1.25 1.00 25 14 UNITS V V ns nC
2
HUF76112SK8 Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 ID, DRAIN CURRENT (A) 6 0.8 0.6 0.4 0.2 0 0 0 25 50 75 100 125 150 25 50 75 100 125 150 TA , AMBIENT TEMPERATURE (oC) TA, AMBIENT TEMPERATURE (oC) 8
VGS = 10V, RJA = 50oC/W
4
2
VGS = 5V, RJA = 189oC/W
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs AMBIENT TEMPERATURE
3 1 THERMAL IMPEDANCE ZJA, NORMALIZED DUTY CYCLE - DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA 10-2 10-1 100 101 102 103 RJA = 50oC/W
0.1
0.01
SINGLE PULSE 0.001 10-5 10-4 10-3
t, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
1000
RJA = 50oC/W
TA = 25oC FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS:
IDM, PEAK CURRENT (A)
100 VGS = 5V VGS = 10V
I = I25
150 - TA 125
10
1 10-5
TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION 10-4 10-3 10-2 10-1 t, PULSE WIDTH (s) 100 101 102 103
FIGURE 4. PEAK CURRENT CAPABILITY
3
HUF76112SK8 Typical Performance Curves
500 RJA = 50oC/W IAS , AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) SINGLE PULSE TJ = MAX RATED TA = 25oC 100s
(Continued)
200 100 If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) If R 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]
100
10 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 1 1 10
10 STARTING TJ = 150oC
STARTING TJ = 25oC
1ms
10ms 100
1 0.01
0.1
1
10
100
VDS , DRAIN TO SOURCE VOLTAGE (V)
tAV, TIME IN AVALANCHE (ms)
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
NOTE: Refer to Intersil Application Notes AN9321 and AN9322. FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
25 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDD = 15V
ID, DRAIN CURRENT (A)
25 VGS = 10V 20 VGS = 5V VGS = 4.5V 15 VGS = 4V VGS = 3.5V 10 VGS = 3V 5 TA = 25oC 0 0.5 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 1.0 1.5 2.0
ID, DRAIN CURRENT (A)
20
15
10 TJ = 150oC 5 TJ = -55oC 0 1.5 2.0 2.5 3.0 3.5 4.0 VGS , GATE TO SOURCE VOLTAGE (V) TJ = 25oC
0
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. SATURATION CHARACTERISTICS
50 NORMALIZED DRAIN TO SOURCE ON RESISTANCE PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX rDS(ON), DRAIN TO SOURCE ON RESISTANCE (m) 40 ID = 7.5A
1.6 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 7.5A
1.3
30 ID = 1A 20
1.0
10 2 4 6 8 VGS , GATE TO SOURCE VOLTAGE (V) 10
0.7 -80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC)
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
FIGURE 10. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
4
HUF76112SK8 Typical Performance Curves
1.2 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE VGS = VDS, ID = 250A NORMALIZED GATE THRESHOLD VOLTAGE
(Continued)
1.2 ID = 250A
1.0
1.1
0.8
1.0
0.6 -80
-40
0
40
80
120
160
0.9 -80
-40
0
40
80
120
160
TJ, JUNCTION TEMPERATURE (oC)
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
2000 1000
C, CAPACITANCE (pF)
10 CISS = CGS + CGD VGS , GATE TO SOURCE VOLTAGE (V) VDD = 15V 8
COSS CDS + CGD
6
4 WAVEFORMS IN DESCENDING ORDER: ID = 7.5A ID = 1A 0 3 6 9 12 15
100
CRSS = CGD
2
VGS = 0V, f = 1MHz 20 0.1 1.0 10 30 VDS , DRAIN TO SOURCE VOLTAGE (V)
0 Qg , GATE CHARGE (nC)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260. FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
80 VGS = 5V, VDD = 15V, ID = 4.0A SWITCHING TIME (ns) 60
td(OFF)
120 VGS = 10V, VDD = 15V, ID = 7.5A 100 SWITCHING TIME (ns) 80 tf 60 40 20 0 tr td(OFF)
tf 40 tr 20 td(ON) 0 0 10 20 30 40 50 RGS, GATE TO SOURCE RESISTANCE ()
td(ON) 0 10 20 30 40 50
RGS , GATE TO SOURCE RESISTANCE ()
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
FIGURE 16. SWITCHING TIME vs GATE RESISTANCE
5
HUF76112SK8 Test Circuits and Waveforms
VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG tP
+
VDS VDD
IAS VDD
-
0V
IAS 0.01 0 tAV
FIGURE 17. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 18. UNCLAMPED ENERGY WAVEFORMS
VDS RL VDD VDS VGS = 10V VGS
+
Qg(TOT)
Qg(TOT) VDD VGS VGS = 1V 0 Qg(TH) Qgs Ig(REF) 0 Qgd VGS = 5V
DUT Ig(REF)
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
VDS
tON td(ON) RL VDS
+
tOFF td(OFF) tr tf 90%
90%
VGS
DUT RGS
VDD 0
10% 90%
10%
VGS VGS 0 10%
50% PULSE WIDTH
50%
FIGURE 21. SWITCHING TIME TEST CIRCUIT
FIGURE 22. SWITCHING TIME WAVEFORM
6
HUF76112SK8 Thermal Resistance vs Mounting Pad Area
The maximum rated junction temperature, TJM , and the thermal resistance of the heat dissipating path determines the maximum allowable device power dissipation, PDM , in an application. Therefore the application's ambient temperature, TA (oC), and thermal resistance RJA (oC/W) must be reviewed to ensure that TJM is never exceeded. Equation 1 mathematically represents the relationship and serves as the basis for establishing the rating of the part.
( T JM - T A ) P DM = -----------------------------Z JA
compromise between the copper board area, the thermal resistance and ultimately the power dissipation, PDM . Thermal resistances corresponding to other copper areas can be obtained from Figure 23 or by calculation using Equation 2. RJA is defined as the natural log of the area times a coefficient added to a constant. The area, in square inches is the top copper area including the gate and source pads.
R JA = 83.2 - 23.6 x
ln ( Area )
(EQ. 2)
(EQ. 1)
In using surface mount devices such as the SO8 package, the environment in which it is applied will have a significant influence on the part's current and maximum power dissipation ratings. Precise determination of PDM is complex and influenced by many factors: 1. Mounting pad area onto which the device is attached and whether there is copper on one side or both sides of the board. 2. The number of copper layers and the thickness of the board. 3. The use of external heat sinks. 4. The use of thermal vias. 5. Air flow and board orientation. 6. For non steady state applications, the pulse width, the duty cycle and the transient thermal response of the part, the board and the environment they are in. Intersil provides thermal information to assist the designer's preliminary application evaluation. Figure 23 defines the RJA for the device as a function of the top copper (component side) area. This is for a horizontally positioned FR-4 board with 1oz copper after 1000 seconds of steady state power with no air flow. This graph provides the necessary information for calculation of the steady state junction temperature or power dissipation. Pulse applications can be evaluated using the Intersil device Spice thermal model or manually utilizing the normalized maximum transient thermal impedance curve. Displayed on the curve are RJA values listed in the Electrical Specifications table. The points were chosen to depict the
150 COPPER BOARD AREA - DESCENDING ORDER 120
ZJA, THERMAL IMPEDANCE (oC/W)
The transient thermal impedance (ZJA) is also effected by varied top copper board area. Figure 24 shows the effect of copper pad area on single pulse transient thermal impedance. Each trace represents a copper pad area in square inches corresponding to the descending list in the graph. Spice and SABER thermal models are provided for each of the listed pad areas. Copper pad area has no perceivable effect on transient thermal impedance for pulse widths less than 100ms. For pulse widths less than 100ms the transient thermal impedance is determined by the die and package. Therefore, CTHERM1 through CTHERM5 and RTHERM1 through RTHERM5 remain constant for each of the thermal models. A listing of the model component values is available in Table 1.
240 RJA = 83.2 - 23.6*ln(AREA) 200 RJA (oC/W) 189oC/W - 0.0115in2
160
152oC/W - 0.054in2
120
80 0.01
0.1 AREA, TOP COPPER AREA (in2)
1.0
FIGURE 23. THERMAL RESISTANCE vs MOUNTING PAD AREA
90
0.04 in2 0.28 in2 0.52 in2 0.76 in2 1.00 in2
60
30
0 10-1
100
101 t, RECTANGULAR PULSE DURATION (s)
102
103
FIGURE 24. THERMAL IMPEDANCE vs MOUNTING PAD AREA
7
HUF76112SK8 PSPICE Electrical Model
.SUBCKT HUF76112SK8 2 1 3 ;
CA 12 8 8.00e-10 CB 15 14 7.40e-10 CIN 6 8 6.90e-10 DBODY 7 5 DBODYMOD DBREAK 5 11 DBREAKMOD DPLCAP 10 5 DPLCAPMOD
10
REV 9 Mar 2000
LDRAIN DPLCAP 5 RLDRAIN DBREAK 11 + 17 EBREAK 18 DRAIN 2 RSLC1 51 ESLC 50
RSLC2
5 51
ESG 6 8 + LGATE GATE 1 RLGATE CIN EVTEMP RGATE + 18 22 9 20 EVTHRES + 19 8 6
IT 8 17 1 LDRAIN 2 5 1.00e-9 LGATE 1 9 1.12e-9 LSOURCE 3 7 1.29e-10 MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 5.00e-3 RGATE 9 20 2.82 RLDRAIN 2 5 10 RLGATE 1 9 9 11.2 RLSOURCE 3 7 1.29 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 10.00e-3 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A S1B S2A S2B 6 12 13 8 S1AMOD 13 12 13 8 S1BMOD 6 15 14 13 S2AMOD 13 15 14 13 S2BMOD
MSTRO LSOURCE 8 RSOURCE RLSOURCE 7 SOURCE 3
S1A 12 S1B CA 13 + EGS 6 8 13 8
S2A 14 13 S2B CB + EDS 5 8 14 IT 15 17
-
-
VBAT 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*215),2))} .MODEL DBODYMOD D (IS = 7.75e-13 RS = 8.08e-3 TRS1 = -1.89e-4 TRS2 = 0 CJO = 1.17e-9 TT = 1.41e-8 M = 0.43) .MODEL DBREAKMOD D (RS = 1.34e-1 TRS1 = 0 TRS2 = 0) ..MODEL DPLCAPMOD D (CJO = 3.72e-10 IS = 1e-30 M = 0.72) .MODEL MMEDMOD NMOS (VTO = 1.90 KP = 1.75 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 2.82) .MODEL MSTROMOD NMOS (VTO = 2.25 KP = 43 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL MWEAKMOD NMOS (VTO = 1.70 KP = 0.10 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 28.2 RS = 0.1) .MODEL RBREAKMOD RES (TC1 = 9.15e-4 TC2 = -2.97e-7) .MODEL RDRAINMOD RES (TC1 = 7.40e-3 TC2 = 2.00e-5) .MODEL RSLCMOD RES (TC1 = 4.93e-3 TC2 = 1.01e-6) .MODEL RSOURCEMOD RES (TC1 = 1.00e-3 TC2 = 0) .MODEL RVTHRESMOD RES (TC1 = -1.85e-3 TC2 = -5.28e-6) .MODEL RVTEMPMOD RES (TC1 = -1.55e-3 TC2 = 0) .MODEL S1AMOD VSWITCH (RON = 1e-5 .MODEL S1BMOD VSWITCH (RON = 1e-5 .MODEL S2AMOD VSWITCH (RON = 1e-5 .MODEL S2BMOD VSWITCH (RON = 1e-5 .ENDS ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 VON = -6.50 VOFF= -2.50) VON = -2.50 VOFF= -6.50) VON = -2.20 VOFF= 0) VON = 0 VOFF= -2.20)
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
8
+
-
EBREAK 11 7 17 18 31.89 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTHRES 6 21 19 8 1 EVTEMP 20 6 18 22 1
RDRAIN 21 16
DBODY
MWEAK MMED
RBREAK 18 RVTEMP 19
VBAT +
8 22 RVTHRES
HUF76112SK8 SABER Electrical Model
REV 9 Mar 2000 template HUF76112SK8 n2,n1,n3 electrical n2,n1,n3 { var i iscl dp..model dbodymod = (is = 7.75e-13,rs=8.08e-3,trs1=-1.89e-4,trs2=0, cjo = 1.17e-9, tt = 1.41e-8, m = 0.43) dp..model dbreakmod = (rs=1.34e-1,trs1=0,trs2=0) dp..model dplcapmod = (cjo = 3.72e-10, is = 1e-30, m = 0.72) m..model mmedmod = (type=_n, vto = 1.90, kp = 1.75, is = 1e-30, tox = 1) m..model mstrongmod = (type=_n, vto = 2.25, kp = 43, is = 1e-30, tox = 1) m..model mweakmod = (type=_n, vto = 1.70, kp = 0.10, is = 1e-30, tox = 1) sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -6.5, voff = -2.5) DPLCAP 5 sw_vcsp..model s1bmod = (ron = 1e-5, roff = 0.1, von = -2.5, voff = -6.5) 10 sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = -2.2, voff = 0) sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 0, voff = -2.2) c.ca n12 n8 = 8.00e-10 c.cb n15 n14 = 7.40e-10 c.cin n6 n8 = 6.90e-10 dp.dbody n7 n5 = model=dbodymod dp.dbreak n5 n11 = model=dbreakmod dp.dplcap n10 n5 = model=dplcapmod i.it n8 n17 = 1 l.ldrain n2 n5 = 1.00e-9 l.lgate n1 n9 = 1.12e-9 l.lsource n3 n7 = 1.29e-10
GATE 1 RLGATE CIN LGATE RSLC1 51 RSLC2 ISCL
LDRAIN DRAIN 2 RLDRAIN
ESG + EVTEMP RGATE + 18 22 9 20 6 6 8 EVTHRES + 19 8
50 RDRAIN 21 16
DBREAK 11 MWEAK MMED EBREAK + 17 18
DBODY
MSTRO 8
m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u
S1A S2A
-
LSOURCE 7 RLSOURCE
SOURCE 3
RSOURCE RBREAK 17 18 RVTEMP 19 IT
res.rbreak n17 n18 = 1, tc1 = 9.15e-4, tc2 = -2.97e-7 12 15 13 14 res.rdrain n50 n16 = 5.00e-3, tc1 = 7.40e-3, tc2 = 2.00e-5 8 13 res.rgate n9 n20 = 2.82 res.rldrain n2 n5 = 10 S1B S2B res.rlgate n1 n9 = 11.2 13 CB CA res.rlsource n3 n7 = 1.29 + 14 + res.rslc1 n5 n51 = 1e-6, tc1 = 4.93e-3, tc2 = 1.01e-6 6 5 res.rslc2 n5 n50 = 1e3 EGS 8 EDS 8 res.rsource n8 n7 = 10.00e-3, tc1 = 1.00e-3, tc2 = 0 res.rvtemp n18 n19 = 1, tc1 = -1.55e-3, tc2 = 0 res.rvthres n22 n8 = 1, tc1 = -1.85e-3, tc2 = -5.28e-6 spe.ebreak n11 n7 n17 n18 = 31.89 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 spe.evthres n6 n21 n19 n8 = 1 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1 equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/215))** 2)) } }
VBAT +
8 RVTHRES
22
9
HUF76112SK8 SPICE Thermal Model
REV 11 Nov 1999 ITF86130SK8T Copper Area = 0.04 in2 CTHERM1 th 8 2.0e-3 CTHERM2 8 7 5.0e-3 CTHERM3 7 6 1.0e-2 CTHERM4 6 5 4.0e-2 CTHERM5 5 4 9.0e-2 CTHERM6 4 3 1.2e-1 CTHERM7 3 2 0.5 CTHERM8 2 tl 1.3 RTHERM1 th 8 0.1 RTHERM2 8 7 0.5 RTHERM3 7 6 1.0 RTHERM4 6 5 5.0 RTHERM5 5 4 8.0 RTHERM6 4 3 26 RTHERM7 3 2 39 RTHERM8 2 tl 55
th JUNCTION
RTHERM1 8
CTHERM1
RTHERM2 7
CTHERM2
RTHERM3 6
CTHERM3
SABER Thermal Model
Copper Area = 0.04 in2 template thermal_model th tl thermal_c th, tl { ctherm.ctherm1 th 8 = 2.0e-3 ctherm.ctherm2 8 7 = 5.0e-3 ctherm.ctherm3 7 6 = 1.0e-2 ctherm.ctherm4 6 5 = 4.0e-2 ctherm.ctherm5 5 4 = 9.0e-2 ctherm.ctherm6 4 3 = 1.2e-1 ctherm.ctherm7 3 2 = 0.5 ctherm.ctherm8 2 tl = 1.3 rtherm.rtherm1 th 8 = 0.1 rtherm.rtherm2 8 7 = 0.5 rtherm.rtherm3 7 6 = 1.0 rtherm.rtherm4 6 5 = 5.0 rtherm.rtherm5 5 4 = 8.0 rtherm.rtherm6 4 3 = 26 rtherm.rtherm7 3 2 = 39 rtherm.rtherm8 2 tl = 55 } TABLE 1. THERMAL MODELS COMPONENT CTHERM6 CTHERM7 CTHERM8 RTHERM6 RTHERM7 RTHERM8 0.04in2 1.2e-1 0.5 1.3 26 39 55 0.28in2 1.5e-1 1.0 2.8 20 24 38.7
RTHERM4 5
CTHERM4
RTHERM5 4
CTHERM5
RTHERM6 3
CTHERM6
RTHERM7 2
CTHERM7
RTHERM8
CTHERM8
tl
CASE
0.52in2 2.0e-1 1.0 3.0 15 21 31.3
0.76in2 2.0e-1 1.0 3.0 13 19 29.7
1.0in2 2.0e-1 1.0 3.0 12 18 25
10
HUF76112SK8 MS-012AA
8 LEAD JEDEC MS-012AA SMALL OUTLINE PLASTIC PACKAGE
E E1 1 e 2 A A1
INCHES SYMBOL A A1 b c MIN 0.0532 0.004 0.013 0.0075 0.189 0.2284 0.1497 MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.244 0.1574
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 5.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 6.20 4.00 NOTES 2 3 4
D 6
D
b
E E1 e H
5
h x 45o
0.050 BSC 0.0099 0.016 0.0196 0.050
1.27 BSC 0.25 0.40 0.50 1.27
c
L
L 0.060 1.52 0o-8o
0.004 IN 0.10 mm
0.050 1.27 0.024 0.6
0.155 4.0 0.275 7.0 MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE-MOUNTED APPLICATIONS
NOTES: 1. All dimensions are within allowable dimensions of Rev. C of JEDEC MS-012AA outline dated 5-90. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.006 inches (0.15mm) per side. 3. Dimension "E1" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 0.010 inches (0.25mm) per side. 4. "L" is the length of terminal for soldering. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. Controlling dimension: Millimeter. 7. Revision 8 dated 5-99.
1.5mm DIA. HOLE
4.0mm USER DIRECTION OF FEED 2.0mm 1.75mm C L
MS-012AA
12mm TAPE AND REEL
12mm
8.0mm
40mm MIN. ACCESS HOLE 18.4mm COVER TAPE 13mm 330mm 50mm
GENERAL INFORMATION 1. 2500 PIECES PER REEL. 2. ORDER IN MULTIPLES OF FULL REELS ONLY. 3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.
12.4mm
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HUF76112SK8
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